A method in which the key input can be recognized by a minimum number of signal lines has been needed because multiple lines, such as scanning lines, cannot be used in the structure of inputs by separated keys or a fuzzy chip such as a cleaner. Generally, a fuzzy chip and a circuit receiving a separated key or an analog input form a system which is able to recognize a key input with a minimum number of signal lines without scanning lines. Therefore, for such a structure of a separated key or fuzzy chip, such as a cleaner, multiple lines, such as key scan lines cannot be used, and a method is required for recognizing the keys with a minimum number of lines.
To solve this problem, each of the keys can be constructed so as to be provided with a different level of input voltage from each other. However, while this enables the recognition of key inputs by a minimum number of signal lines, a circuit for applying different voltage levels to a key input circuit according to each key is very complicated. Particularly, if two or more keys are pressed, recognizing errors of key inputs can occur and it is difficult to detect same.
FIG. 1 shows a block diagram of a conventional switch multiple selection detecting circuit as disclosed in Japanese Laid-Open Publication No. Pyung Sung 1-103317. The circuit includes a plurality of switches 1 arranged in a matrix, a switching driving circuit 7 for driving the switches 1 by means of a clock, a flip-flop 2 for memorizing a switch state of the switches in a constant period as driven by the switch driving circuit 7, a multiple selection detecting part 4 for determining whether or not the switch is multiple-selected from the output of the flip-flop 2 and a strobe signal generating part 13 for outputting a signal when a multiple selection does not occur so that a low level signal is output when the multiple switch is selected, whereas when the multiple switch is not selected, the high level signal is output by a strobe signal output OK. As shown in FIG. 1, strobe signal generating part 13 may include an AND gate having a pair of inverted inputs. One of these inputs receives an output 9 from detecting part 4, and the other one of the inputs receives an output 8 from circuit 3 which is an NAND gate coupled to receive outputs of the flip-flop 2. As also shown in FIG. 1, the clock provided to circuit 7 and flip-flop 2 is provided by the circuit including NAND gate 11 and inverter 12. In the conventional circuit, the output is stopped, if multiple switches are selected, and otherwise, the operation according to the input key is performed. Accordingly, the existence of the multiple switch selection is determined only to perform a more accurate operation, and the method for recognizing multiple key inputs by one line has not been suggested. Also, while multiple switch selection key input errors are detected by stopping the output, the constitution of the circuit is rather complicated.